DocumentCode
1322684
Title
The formal description and verification of hardware timing
Author
Milne, George J.
Author_Institution
Dept. of Comput. Sci., Strathclyde Univ., Glasgow, UK
Volume
40
Issue
7
fYear
1991
fDate
7/1/1991 12:00:00 AM
Firstpage
811
Lastpage
826
Abstract
A formalism in which timing properties of digital hardware may be specified, derived, and formally verified is introduced as a rigorous theory for hardware timing. A rigorous modeling framework has been used to create a family of related verification techniques rather than a single timing analysis tool. This framework is based on a model of interacting finite state machines called CIRCAL, a formalism developed for the purpose of describing and validating complex concurrent systems. In this approach to hardware timing analysis, the presence of a composition operator is all-pervasive. It provides a single, uniform mechanism for describing the behavior of interacting hardware modules and for establishing and describing the timing properties of such modules
Keywords
finite automata; logic design; CIRCAL; finite state machines; formal description; hardware timing; modeling framework; verification; verification techniques; Automata; Computer science; Hardware; Helium; Integrated circuit modeling; Logic design; Mechanical factors; Modular construction; Timing; Very large scale integration;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.83619
Filename
83619
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