Title :
Unified 1/f noise SOI MOSFET modelling for circuit simulation
Author :
Iñíguez, B. ; Tambani, M. ; Dessard, V. ; Flandre, D.
Author_Institution :
Dept ECSE, Rensselaer Polytech. Inst., Troy, NY, USA
fDate :
10/9/1997 12:00:00 AM
Abstract :
The authors address the modelling of 1/f noise in SOI MOS devices for circuit simulation. A simple and unified model is presented which is valid for all operating regimes; it is verified by comparison with noise measurements. It is shown that this model is especially useful for low-power SOI MOS circuit design
Keywords :
1/f noise; MOSFET; circuit analysis computing; integrated circuit design; integrated circuit noise; semiconductor device models; semiconductor device noise; silicon-on-insulator; SOI MOSFET modelling; Si; circuit simulation; low-power SOI MOS circuit design; unified 1/f noise modelling;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19971196
