Title :
A high-density NAND EEPROM with block-page programming for microcomputer applications
Author :
Iwata, Yoshihisa ; Momodomi, Masaki ; Tanaka, Tomoharu ; Oodaira, Hideko ; Itoh, Yasuo ; Nakayama, Ryozo ; Kirisawa, Ryouhei ; Aritome, Seiichi ; Endoh, Tetsuo ; Shirota, Riichiro ; Ohuchi, Kazunori ; Masuoka, Fujio
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fDate :
4/1/1990 12:00:00 AM
Abstract :
A high-density, 5-V-only, 4-Mb CMOS EEPROM with a NAND-structured cell using Fowler-Nordheim tunneling for programming is discussed. The block-page mode is utilized for high-speed programming and easy microprocessor interface. On-chip test circuits for shortening test time and for evaluating cell characteristics yield highly reliable EEPROMs. The NAND EEPROM has many applications for microcomputer systems that require small size and large nonvolatile storage systems with low power consumption
Keywords :
CMOS integrated circuits; EPROM; VLSI; integrated circuit technology; integrated circuit testing; integrated memory circuits; reliability; 4 Mbit; 5 V; CMOS EEPROM; Fowler-Nordheim tunneling; NAND EEPROM; NAND-structured cell; ULSI; block-page mode; block-page programming; easy microprocessor interface; high-density; high-speed programming; highly reliable EEPROMs; low power consumption; microcomputer applications; nonvolatile storage systems; on-chip test circuits; reliability; test time shortening; Associate members; CMOS memory circuits; Circuit testing; Costs; EPROM; Equivalent circuits; Microcomputers; Nonvolatile memory; Portable computers; Threshold voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
