A high resolution output voltage multilevel inverter topology with few cascade-connected cells

This paper presents a study of a generalized multilevel asymmetric inverter based on a H-Bridge Cell with one Arm Series (CHB-as) and five switches. It is shown several asymmetrical arrangements of input source combinations that produce several equally spaced voltage levels with few components. Equations for determining the switching frequency employed in the low power processing cells are developed, and demonstrate the possibility of high resolution output voltage even at low frequency. The simulations of a two cascade asymmetric cells 1 kW-220 V topology, implemented in the program Orcad Pspice, V. 16.5 validated analyzes showed that the inverter operating with only two cells resulted output voltage with 25 levels. The results presented show that in topologies with three cascade cells it is feasible to obtain output voltages with 85 levels for the first proposed configuration or even 125 levels for the second configuration without redundant instances in the output voltage.