A PWM control strategy for low-speed operation of three-level NPC inverter based on bootstrap gate drive circuit

This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. For the purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. To solve this problem, the dipolar and partial-dipolar modulation can be the effective solution. Nevertheless, these modulation have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.