Title :
Layout Variation Effects in Advanced MOSFETs: STI-Induced Embedded SiGe Strain Relaxation and Dual-Stress-Liner Boundary Proximity Effect
Author :
Choi, Youn Sung ; Lian, Guoda ; Vartuli, Catherine ; Olubuyide, Oluwamuyiwa ; Chung, Jayhoon ; Riley, Deborah ; Baldwin, Greg
Author_Institution :
Texas Instrum., Inc., Dallas, TX, USA
Abstract :
This paper reports two areas of focus for layout variation effects in advanced strained-Si technology: 1) shallow-trench isolation (STI)-induced embedded SiGe (eSiGe) strain relaxation and 2) impact of dual-stress-liner (DSL) boundary on channel mobility. A complete data analysis, including two different strain measurement techniques of nanobeam diffraction and geometric phase analysis, is presented, along with a quantitative understanding for each effect. It is reported that the eSiGe profile can have a significant impact on the STI proximity effect for p-MOSFETs and that DSL boundary proximity can cause significant channel mobility degradation for both n- and p-MOSFETs. Both effects result in the reduction in channel strain along the [110] direction.
Keywords :
Ge-Si alloys; MOSFET; isolation technology; strain measurement; MOSFET; STI; SiGe strain relaxation; channel mobility; dual-stress-liner boundary proximity effect; geometric phase analysis; layout variation effect; nanobeam diffraction; shallow-trench isolation; strain measurement technique; Diamond-like carbon; MOSFET circuits; Proximity effect; Silicon germanium; Strain; Transistors; Dual stress liner (DSL); embedded SiGe source/drain (eSiGe S/D); mobility; piezoresistance coefficient; strain relaxation;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2010.2066567
