DocumentCode :
1324105
Title :
Test Response Compaction via Output Bit Selection
Author :
Kuen-Jong Lee ; Wei-Cheng Lien ; Tong-Yu Hsieh
Author_Institution :
Dept. of Electr. En gineering, Nat. Cheng Kung Univ., Tainan, Taiwan
Volume :
30
Issue :
10
fYear :
2011
Firstpage :
1534
Lastpage :
1544
Abstract :
The conventional output compaction methods based on XOR-networks and/or linear feedback shift registers may suffer from the problems of aliasing, unknown-values, and/or poor diagnosability. In this paper, we present an alternative method called the output-bit-selection method to address the test compaction problem. By observing only a subset of output responses, this method can effectively deal with all the above-mentioned problems. Efficient algorithms that can identify near optimum subsets of output bits to cover all detectable faults in very large circuits are developed. Experimental results show that less than 10% of the output response bits of an already very compact test set are enough to achieve 100% single stuck-at fault coverage for most ISCAS benchmark circuits. Even better results are obtained for ITC 99 benchmark circuits as less than 3% of output bits are enough to cover all stuck-at faults in these circuits. The increase ratio of selected bits to cover other types of faults is shown to be quite small if these faults are taken into account during automatic test pattern generation. Furthermore, the diagnosis resolution of this method is almost the same as that achieved by observing all output response bits.
Keywords :
automatic test pattern generation; fault diagnosis; logic testing; shift registers; ISCAS benchmark circuits; ITC 99 benchmark circuits; XOR-networks; automatic test pattern generation; fault detection; feedback shift registers; output bit selection; stuck-at fault coverage; test response compaction; Benchmark testing; Circuit faults; Compaction; Data structures; Fault detection; Greedy algorithms; Sparse matrices; Output bit selection; test compression; test response compaction;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2011.2159116
Filename :
6022010
Link To Document :
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