Dual Algorithms for Vectorless Power Grid Verification Under Linear Current Constraints

Vectorless power grid verification makes it possible to evaluate worst-case voltage noises without enumerating possible current waveforms. Under linear current constraints, the vectorless power grid verification problem can be formulated and solved as a linear programming (LP) problem. However, previous approaches suffer from long runtime due to the large problem size. In this paper, we design two dual algorithms that efficiently evaluate voltage noises in a resistor/capacitor power grid. Our algorithms combine novel dual approaches to solve the LP problem, and a preconditioned conjugate gradient power grid analyzer. The first algorithm exploits the structure of the problem to simplify its dual problem into a convex problem, which is then solved by the cutting-plane method. The second algorithm formulates a reduced-size LP problem for each node to compute upper bound of voltage noise. Experimental results show that both algorithms are highly efficient.