DocumentCode :
1324918
Title :
An RLL-Constrained LDPC Coded Recording System Using Deliberate Flipping and Flipped-Bit Detection
Author :
Chou, Hong-Fu ; Ueng, Yeong-Luh ; Lin, Mao-Chao ; Fossorier, Marc P C
Author_Institution :
Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
60
Issue :
12
fYear :
2012
fDate :
12/1/2012 12:00:00 AM
Firstpage :
3587
Lastpage :
3596
Abstract :
In this paper, a low-density parity-check (LDPC) coded recording system is investigated, for which the run-length-limited (RLL) constraint is satisfied by deliberate flipping at the write side and by estimating the flipped bits at the read side. Two approaches are proposed for enhancing the error performance of such a system. The first approach is to alleviate the negative effect of incorrect estimation of the flipped bits by adjusting the soft information. The second approach is to increase the likelihood of the correct detection of flipped bits by designing a flipped-bit detection algorithm that utilizes both the RLL constraint and the parity-check constraint of the LDPC code. These two approaches can be combined to obtain significant improvement in performance over previously proposed methods.
Keywords :
parity check codes; RLL constrained LDPC coded recording system; RLL constraint; deliberate flipping; flipped bit detection algorithm; flipped bits; low density parity check coded recording system; parity check constraint; run length limited constraint; soft information; Bit error rate; Decoding; Equalizers; Jitter; Mutual information; Noise measurement; Parity check codes; Constrained codes; low-density parity-check (LDPC) codes; recording; run-length-limited (RLL);
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOMM.2012.101712.110501
Filename :
6336757
Link To Document :
بازگشت