Full-MOSFET mixed-mode duty cycle corrector

A novel mixed-mode 50% duty cycle corrector (DCC) based on a digital process is proposed. The DCC adopts both digital and analogue correction methods in which a half cycle delay line is used for coarse correction, and an analogue feedback loop based on full-MOSFETs for further fine tuning to achieve fast settling and high precision. The rising edge of the output clock has a constant delay compared to the input clock, which makes the DCC easy to cooperate with a delay locked loop. Simulated results using 0.13 μm CMOS technology show that the output duty cycle is corrected to 50±0.22% throughout the input duty cycle range from 20 to 80% in the frequency range 200 MHz-2 GHz.