Title :
Highly efficient balanced CMOS linear power amplifier with load immunity
Author :
Jeon, Hyung-Joon ; Yoon, Yong Soo ; Kim, Heonhwan ; Huang, Yu-Yen ; Lee, Chia-Han
Author_Institution :
Georgia Electron. Design Center GEDC, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A 1.95 GHz linear power amplifier (PA) in a standard 0.18 m CMOS process is presented. The PA achieves the load insensitivity characteristic up to 2.5:1 VSWR condition and dual-mode operation with a balanced topology. The area of the PA is 1.6 × 1 mm2. With a 3.4 V power supply, the PA provides 40.4 of peak power-added efficiency (PAE) and 35 of PAE at 26.4 dBm of linear output power.
Keywords :
CMOS integrated circuits; UHF integrated circuits; UHF power amplifiers; CMOS linear power amplifier; UHF integrated circuits; UHF power amplifiers; dual-mode operation; frequency 1.95 GHz; load immunity; power-added efficiency; size 0.18 mum; voltage 3.4 V;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2011.2406
