Modified phasor pulse width modulation method for three-phase single-stage boost inverter

Three-phase single-stage boost inverter requires narrow pulses, thus a low resolution DSP can cause some pulse droppings which results in asymmetries in the output waveforms of the boost inverter. This leads to an increase in the total harmonic distortion (THD) of the output waveforms. In order to solve this problem, a modified version of the phasor pulse width modulation (PPWM) switching pattern is developed based on constant charging time over each sector and staircase pattern for the discharging times variation. Also, the boost inverter needs a relatively large dc-link inductor to boost and convert a small dc voltage to a nominal ac voltage. Due to the existence of the dc-link inductor, large voltage spikes appear across inverter switches. Thus, in the modified PPWM method an overlap-time is implemented in order to suppress the voltage spikes. A 2kW 208/230V laboratory-scale three-phase boost inverter has been designed, built and tested using reverse-blocking IGBTs. The behavior of the boost inverter along with the modified PPWM switching pattern and the overlap-time has been investigated, and the results are presented in this paper.