Title :
Impact of Circuit Placement on Single Event Transients in 65 nm Bulk CMOS Technology
Author :
Yibai, He ; Shuming, Chen ; Jianjun, Chen ; Yaqing, Chi ; Bin, Liang ; Biwei, Liu ; Junrui, Qin ; Yankang, Du ; Pengcheng, Huang
Author_Institution :
Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China
Abstract :
Heavy ion experiments on 65 nm bulk CMOS inverter chains demonstrate the impact of circuit placement on single-event transients (SETs). Experimental data and simulations show that the horizontal placement design significantly reduces the SET pulse width and SET cross-section compared to the vertical placement design due to the existence of pulse quenching.
Keywords :
CMOS integrated circuits; invertors; ion beam effects; pulse circuits; transistors; SET cross-section; SET pulse width; bulk CMOS inverter chains; bulk CMOS technology; circuit placement impact; experimental data; experimental simulations; heavy ion experiments; horizontal placement design; pulse quenching existence; single-event transients; transistors; vertical placement design; CMOS integrated circuits; CMOS technology; Layout; Pulse measurements; Single event transient; Transient analysis; Charge sharing; pulse quenching; single event; single-event transient;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2012.2218256
