Design, Simulation, and Fabrication of Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET) With New Termination Structure

In this paper, we introduce a new type of termination structure utilizing semi-insulating polycrystalline silicon (SIPOS) structures in conjunction with P^- junction extension in order to reduce the area of termination device structure and increase the breakdown voltage. In SIPOS structures, one high-resistance layer is deposited between electrodes on two terminals such that the voltage between two electrodes is linearly distributed instead of the original nonlinear distribution. Compared to a traditional termination structure device (with a length of 180 μm and a breakdown voltage at 570 V), the optimal design of the new type of termination structure will lead to an increase of 40 V in the breakdown voltage and a 22.2% area reduction. From the perspective of device fabrication, it has been proven that the new type of termination structure indeed consumes less area while simultaneously realizing an enhanced device breakdown voltage as high as 710 V and a specific on-resistance at 137 mΩ·cm², which is consistent to the simulation results.