TAB as a high leadcount PGA replacement

Author

Deeney, Jeffrey L. ; Halbert, David B. ; Nobi, Laszlo

Author_Institution

Hewlett-Packard Co., Fort Collins, CO, USA

Volume

14

Issue

3

fYear

1991

fDate

9/1/1991 12:00:00 AM

Firstpage

543

Lastpage

548

Abstract

A high-performance tape-automated-bonding (TAB) package has been developed for a TAB on board (TOB) application as a replacement for high lead count, high power, ceramic pin grid array (CPGA) packages. Leadcount is in excess of 250 pins and each package can dissipate more than 10 W at relatively low air flow rates. This technology has been implemented on a multichip VLSI-based processor board. The processor board contains six TAB devices on a 10 layer 8×14 in surface-mount-technology (SMT) PC board, as well as other SMT and through hole components. The package uses a unique bumpless inner lead bonding process on a 110-μm (4.3 mil) pitch and a 406 μm (16 mil) pitch solder reflow outer lead bonding process. Reliability has been demonstrated through extensive testing at both the package and system level. The authors provide an overview of the package construction, assembly processes, and reliability testing

Keywords

VLSI; heat sinks; packaging; printed circuit manufacture; surface mount technology; tape automated bonding; 10 W; PCBs; SMT; TAB devices; TAB on board; TOB; assembly processes; bumpless inner lead bonding process; high leadcount PGA replacement; high pincount packages; multichip VLSI-based processor board; package construction; reliability testing; solder reflow outer lead bonding process; Application software; Bonding processes; Ceramics; Costs; Electronic packaging thermal management; Electronics packaging; Gold; Lead; Surface-mount technology; Wafer bonding;

fLanguage

English

Journal_Title

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

0148-6411

Type

jour

DOI

10.1109/33.83942

Filename

83942