Palladium as a lead finish for surface mount integrated circuit packages

Author

Abbott, Donald C. ; Brook, Richard M. ; McLelland, Neil ; Wiley, John S.

Author_Institution

Texas Instrum. Inc., Attleboro, MA, USA

Volume

14

Issue

3

fYear

1991

fDate

9/1/1991 12:00:00 AM

Firstpage

567

Lastpage

572

Abstract

The authors discuss the use of a thin, preplated palladium lead finish as an alternative to solder. Tests and experiments designed to examine several key properties and behaviors of Pd as related to this application were performed. These tests included: wetting characteristics, solder joint metallurgy, wire bonding, interaction with molding compounds, and electrochemical characteristics. Following initial feasibility studies, an extensive set of reliability and performance tests were run on a wide range of packaged integrated circuits. These included: operating life, temperature/humidity, thermal cycle/shock, lead finish performance and visual/mechanical tests

Keywords

environmental testing; palladium; reliability; soldering; surface mount technology; Pd lead finish; alternative to solder; electrochemical characteristics; feasibility studies; interaction with molding compounds; lead finish performance; mechanical tests; operating life; performance tests; range of packaged integrated circuits; solder joint metallurgy; surface mount IC packages; temperature humidity tests; thermal cycling tests; thermal shock tests; wetting characteristics; wire bonding; Bonding; Circuit testing; Integrated circuit reliability; Integrated circuit testing; Lead; Palladium; Performance evaluation; Soldering; Surface finishing; Wire;

fLanguage

English

Journal_Title

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

0148-6411

Type

jour

DOI

10.1109/33.83945

Filename

83945