Steady-state and large-signal design of current-programmed DC-DC converters

A new method for steady-state design of current-programmed-mode (CPM) DC-DC converters is presented. The method uses a set of equations derived based on the relationships between line voltage, load current, control current, and the stabilizing artificial ramp. The set of normalized equations are verified by a fast large-signal simulation and experimental measurement. These equations are plotted on the converter DC output plane (a graph of output current versus output voltage) in which characteristic curves related to different artificial ramps and boundaries of different operating modes are indicated. A general design procedure is presented for a CPM converter with both input voltage and output resistive load varied. By this means, the design time can be significantly reduced, and systematic design trade-offs can be made to ensure correct converter operation over the desired range of line and load variation