DocumentCode
1327689
Title
An improved junction field-effect transistor static model for integrated circuit simulation
Author
Wong, W.W. ; Liou, J.J. ; Prentice, J.
Author_Institution
Dept. of Electr. Eng., Univ. of Central Florida, Orlando, FL, USA
Volume
37
Issue
7
fYear
1990
fDate
7/1/1990 12:00:00 AM
Firstpage
1773
Lastpage
1775
Abstract
A physics-based junction field-effect transistor (JFET) static model for integrated circuit simulation is developed. The model covers the behavior of the linear and saturation current regions without requiring fitting parameters. Subthreshold characteristics in the saturation region are also included in the model. Excellent agreement is obtained when the model is compared with experimental data
Keywords
junction gate field effect transistors; semiconductor device models; integrated circuit simulation; junction field-effect transistor static model; linear region; saturation current regions; subthreshold characteristics; Digital circuits; FETs; Fabrication; Integrated circuit measurements; Integrated circuit modeling; JFET integrated circuits; Power electronics; Predictive models; Steady-state; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.55768
Filename
55768
Link To Document