Title :
A 16-bit 250-kHz delta-sigma modulator and decimation filter
Author :
Maulik, Prabir C. ; Chadha, Mandeep S. ; Lee, Wai L. ; Crawley, Philip J.
Author_Institution :
Crystal Semicond. Products Div., Cirrus Logic Inc., Austin, TX, USA
fDate :
4/1/2000 12:00:00 AM
Abstract :
This paper describes a delta-sigma analog-to-digital converter (ADC) capable of converting input frequencies up to 250 kHz. It consists of a fifth-order switched-capacitor delta-sigma modulator and a decimation filter. Various design optimizations in the modulator are presented. The decimation filter consists of a comb filter followed by a novel, highly efficient and scalable finite impulse response filter. The ADC was implemented in 0.6-/spl mu/m CMOS technology. It achieves a dynamic range of 94 db.
Keywords :
CMOS integrated circuits; FIR filters; circuit optimisation; comb filters; delta-sigma modulation; switched capacitor networks; 0.6 micron; 16 bit; 250 kHz; CMOS technology; comb filter; decimation filter; delta-sigma modulator; design optimizations; dynamic range; fifth-order switched-capacitor circuit; finite impulse response filter; input frequencies; Bandwidth; Circuit noise; Delta modulation; Digital filters; Finite impulse response filter; Logic devices; Sampling methods; Semiconductor device noise; Signal to noise ratio; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
