DocumentCode :
1327897
Title :
1.2-V CMOS op-amp with a dynamically biased output stage
Author :
Giustolisi, G. ; Palmisano, G. ; Segreto, T.
Author_Institution :
Dipt. Elettrico, Elettronico e Sistemistico, Catania Univ., Italy
Volume :
35
Issue :
4
fYear :
2000
fDate :
4/1/2000 12:00:00 AM
Firstpage :
632
Lastpage :
636
Abstract :
A very low-voltage operational amplifier in a standard CMOS process with a 0.75 V threshold voltage is presented. It uses a novel dynamically biased output stage based on the switched-capacitor approach. Thanks to this, drive performance is greatly improved and accurate current control is also achieved. The amplifier is capable of working with a power supply as low as 1.2 V while providing a -74 dB total harmonic distortion with a 700 mV peak-to-peak output voltage into a 500 /spl Omega/ and 20 pF output load. The open-loop gain and the gain-bandwidth product are higher than 90 dB and 2.2 MHz, respectively.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; harmonic distortion; low-power electronics; operational amplifiers; switched capacitor networks; 0.75 V; 1.2 V; 700 mV; 90 dB; CMOS op-amp; SC output stage; THD; accurate current control; drive performance improvement; dynamically biased output stage; low-voltage operational amplifier; standard CMOS process; switched-capacitor approach; total harmonic distortion; CMOS process; Circuits; Energy consumption; MOSFETs; Mirrors; Operational amplifiers; Power amplifiers; Power supplies; Rail to rail outputs; Threshold voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.839923
Filename :
839923
Link To Document :
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