DocumentCode
1327936
Title
A robust, load-insensitive pad driver
Author
Dowlatabadi, Ahmad B.
Author_Institution
Velocity Commun., Fremont, CA, USA
Volume
35
Issue
4
fYear
2000
fDate
4/1/2000 12:00:00 AM
Firstpage
660
Lastpage
665
Abstract
A new approach to implement load-insensitive integrated pad drivers in monolithic integrated circuits is presented. The design utilizes a source follower topology along with a simple negative feedback approach to fix and control both rise and fall times independent of loading capacitance. This novel technique was used to implement a differential output pad driver for Universal Serial Bus design in a standard 0.35-/spl mu/m/3-V CMOS technology. The two drivers occupy less than 0.15 mm/sup 2/ of die area and can handle a capacitive load of 0-100 pF and 0-800 pF for 1.2- and 1.5-Mbps data rates, respectively. Measured transition times for 1.2 Mbps (with 50 pF) and 1.5 Mbps (with 350 pF) data rates were 17 and 250 ns, respectively.
Keywords
CMOS integrated circuits; circuit feedback; driver circuits; integrated circuit design; monolithic integrated circuits; 0 to 800 pF; 0.35 micron; 3 V; CMOS technology; USB design; Universal Serial Bus design; differential output pad driver; integrated pad drivers; load-insensitive pad driver; loading capacitance; monolithic integrated circuits; negative feedback; robust pad driver; source follower topology; Atherosclerosis; CMOS technology; Capacitance; Circuit topology; Delay; Driver circuits; Monolithic integrated circuits; Negative feedback; Robustness; Universal Serial Bus;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.839929
Filename
839929
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