• DocumentCode
    13280
  • Title

    Threshold Voltage Control by Substrate Bias in 10-nm-Diameter Tri-Gate Nanowire MOSFET on Ultrathin BOX

  • Author

    Ota, Kaoru ; Saitoh, Masatoshi ; Tanaka, C. ; Numata, T.

  • Author_Institution
    Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
  • Volume
    34
  • Issue
    2
  • fYear
    2013
  • fDate
    Feb. 2013
  • Firstpage
    187
  • Lastpage
    189
  • Abstract
    We investigated the substrate bias effect in 10-nm-diameter tri-gate nanowire (NW) MOSFETs on ultrathin BOX. By employing a thin BOX of 20 nm and a thin NW body, a large body effect factor was achieved, which is sufficient for wide range Vth control. Ion-Ioff adjustment by Vsub of 1 V or -1 V enabled a 13% increase in Ion or a one-order decrease in Ioff, respectively. Negative Vsub could enlarge SRAM noise margin. Thus, a tri-gate NW MOSFET on ultrathin BOX is potential advantage for low power operation by adopting dynamic power and performance management.
  • Keywords
    MOSFET; SRAM chips; nanowires; voltage control; NW; body effect factor; enlarge SRAM noise margin; low power operation; one-order decrease; size 10 nm; size 20 nm; substrate bias; threshold voltage control; trigate nanowire MOSFET; ultrathin BOX; voltage -1 V; voltage 1 V; Logic gates; MOSFET circuits; Nanoscale devices; Random access memory; Silicon; Silicon on insulator technology; Substrates; Silicon nanowire transistor (NW Tr.); silicon on insulator (SOI); substrate bias; thin BOX;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2012.2234719
  • Filename
    6413169