• DocumentCode
    1328064
  • Title

    Fast transient voltage-mode buck regulator applying ramp signal with a variable DC-offset scheme

  • Author

    Tseng, T.-J. ; Wu, Chao-Hsin ; Chang-Chien, Le-Ren

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng-Kung Univ., Tainan, Taiwan
  • Volume
    5
  • Issue
    8
  • fYear
    2012
  • fDate
    9/1/2012 12:00:00 AM
  • Firstpage
    1408
  • Lastpage
    1417
  • Abstract
    A ramp signal with variable DC-offset (RSVDC) scheme implemented in a voltage-mode controlled buck voltage regulator is proposed. To enhance the response of the voltage-mode controlled buck regulator during the load transient, the variable DC-offset ramp signal is applied to drive the duty cycle full or zero, so that the output voltage can instantly respond with load change. The model, compensator and loop gain of the proposed buck regulator are derived and demonstrated. The transistor-level of the RSVDC circuit including the hysteretic comparator, oscillator and the output feedback voltage amplifier is also presented. The controller using the RSVDC scheme was implemented by the TSMC 0.35 m 2P4M process. The simulated and experimental results show that the transient response using the RSVDC scheme is about 10 s, when the load changes from 0.1 to 1 A under a 5 1.8 V voltage conversion. The test results validate the feasibility of the RSVDC control scheme in a buck voltage regulator to fulfil a simple structure, assured stability and fast transient response requirements.
  • Keywords
    CMOS integrated circuits; compensation; feedback; oscillators; power convertors; transient response; transistors; voltage control; RSVDC circuit; TSMC 2P4M process; compensator; current 0.1 A to 1 A; duty cycle; fast transient response requirements; fast transient voltage-mode controlled buck voltage regulator; hysteretic comparator; load change; loop gain; oscillator; output feedback voltage amplifier; size 0.35 mum; time 10 mus; transistor-level; variable DC-offset ramp signal; variable DC-offset scheme; voltage 5 V to 1.8 V; voltage conversion;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IET
  • Publisher
    iet
  • ISSN
    1755-4535
  • Type

    jour

  • DOI
    10.1049/iet-pel.2011.0206
  • Filename
    6340676