DocumentCode :
1328106
Title :
Self-checking binary logic systems using ternary logic circuits
Author :
Hu, Minglie ; Smith, K.C.
Author_Institution :
Shanghai Inst. of Railway Technol., Shanghai, China
Volume :
9
Issue :
3
fYear :
1984
fDate :
7/1/1984 12:00:00 AM
Firstpage :
100
Lastpage :
104
Abstract :
The present status of multivalued logic is highlighted in a Canadian context. A particular example is given of the use of ternary circuits in the solution of the problem of testability of binary logic, through the introduction of a new concept called 2-of-3-valued logic. Its application to the design of combinational and sequential self-checking systems is demonstrated. Topics discussed include: multivalued logic, testability, reliability, ternary logic, CMOS logic, and fault tolerance.
Keywords :
fault tolerant computing; field effect integrated circuits; integrated logic circuits; ternary logic; 2-of-3-valued logic; CMOS logic; Canadian context; circuit solution; fault tolerance; multivalued logic; reliability; self-checking binary logic systems; ternary logic circuits; testability of binary logic; CMOS integrated circuits; Circuit faults; Flip-flops; Inverters; Logic circuits; Logic gates; Multivalued logic; CMOS logic; fault tolerance; multivalued logic; reliability; ternary logic; testability;
fLanguage :
English
Journal_Title :
Electrical Engineering Journal, Canadian
Publisher :
ieee
ISSN :
0700-9216
Type :
jour
DOI :
10.1109/CEEJ.1984.6593793
Filename :
6593793
Link To Document :
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