DocumentCode :
1328271
Title :
Reliability of 
Stacks for DRAM Applications
Author :
Kupke, S. ; Knebel, S. ; Schroeder, U. ; Schmelzer, S. ; Böttger, U. ; Mikolajick, T.
Author_Institution :
Namlab gGmbH, Dresden, Germany
Volume :
33
Issue :
12
fYear :
2012
Firstpage :
1699
Lastpage :
1701
Abstract :
A layer stack of strontium ruthenate/strontium titanate/strontium ruthenate was fabricated by low-rate rf sputtering. A high dielectric permittivity of approximately 200 at a capacitive effective thickness of 0.4 nm in combination with a very low leakage current density JC of 5 × 10-9 A/cm2 at 833 kV/cm was achieved. JC is characterized by a Curie-von Schweidler law before current degradation, and stress-induced leakage current sets in. The charge loss due to dielectric absorption showed values below 2% and was evaluated by a transient floating potential setup. From time-dependent dielectric breakdown measurements, we extrapolated an operating lifetime of approximately 7.5 years.
Keywords :
DRAM chips; absorption; current density; electric breakdown; integrated circuit reliability; leakage currents; sputter deposition; strontium compounds; Curie-von Schweidler law; DRAM application; SrRuO3-SrTiO3-SrRuO3; charge loss; current degradation; dielectric absorption; high dielectric permittivity; leakage current density; low-rate RF sputtering; reliability; size 0.4 nm; stress-induced leakage current set; time-dependent dielectric breakdown measurement; transient floating potential setup; Current measurement; Leakage current; MIM capacitors; Random access memory; Semiconductor device measurement; Strontium compounds; Temperature measurement; Dynamic random access memory (DRAM); MIM capacitor; SrRuO (SRO); SrTiO (STO); high- $k$
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2012.2219032
Filename :
6341041
Link To Document :
