DocumentCode :
1330040
Title :
DSP implementation of self-synchronised chaotic encoder-decoder
Author :
Penaud, S. ; Guittard, J. ; Bouysse, P. ; Quere, R.
Author_Institution :
IRCOM-CNRS, France
Volume :
36
Issue :
4
fYear :
2000
fDate :
2/17/2000 12:00:00 AM
Firstpage :
365
Lastpage :
366
Abstract :
A general structure for a chaotic encoder/decoder pair with nonlinear function is described. Different equations can be used with this structure. The encoder is a nonlinear recursive filter with finite precision. Simulation results and a digital signal processor implementation of this system are presented
Keywords :
chaos; digital signal processor implementation; finite precision; nonlinear function; nonlinear recursive filter; self-synchronised chaotic encoder-decoder;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20000293
Filename :
840265
Link To Document :
بازگشت