Slew rate control strategies for smart power ICs based on iterative learning control

Smart Power ICs are Power Switches with integrated control and protection functions for the switching of middle and high current loads in industrial and automotive applications. Due to customer specifications and electromagnetic compatibility requirements it is often desired to limit the current and voltage slew rate at the output terminal of the Smart Power IC by minimizing the switching losses at the same time. In order to reduce the development effort and costs, a reusable control strategy is strived for. Therefore, a power optimal digital slew rate control strategy is developed which allows for a systematic limitation of the current and/or voltage slew rates. The strategy is based on the optimization of a gate current profile using Iterative Learning Control. A rapid prototyping test bench is developed for the verification of the control strategy. The performance and robustness is demonstrated by means of measurement results.