Title :
An analytical model for breakdown voltage of surface implanted SOI RESURF LDMOS
Author_Institution :
Dept. of Electron. Eng., Ajou Univ., Suwon, South Korea
fDate :
5/1/2000 12:00:00 AM
Abstract :
An analytical model for the breakdown voltage of the surface implanted silicon-on-insulator (SOI) REduced SURface Field (RESURP) LDMOS is presented, which allows useful design curves of breakdown voltage in terms of the device parameters, including the substrate bias voltage. Improvement on both the breakdown voltage and the on-resistance of the device due to the surface implantation is demonstrated. Numerical simulations are shown to support the analytical results
Keywords :
ion implantation; power MOSFET; semiconductor device breakdown; semiconductor device models; silicon-on-insulator; SOI reduced surface field LDMOS; Si; analytical model; breakdown voltage; design curves; device parameters; on-resistance; substrate bias voltage; surface implantation; surface implanted SOI RESURF LDMOS; Analytical models; Breakdown voltage; Doping; Electric breakdown; Helium; Length measurement; Numerical simulation; Position measurement; Semiconductor process modeling; Silicon on insulator technology;
Journal_Title :
Electron Devices, IEEE Transactions on
