A novel planarization technique for a high-T/sub c/ multilevel IC process

Author

Marathe, A.P. ; Van Duzer, T. ; Lee, L.P.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

7

Issue

4

fYear

1997

Firstpage

3834

Lastpage

3839

Abstract

A novel technique has been developed to planarize insulating layers which may be used in a YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// (YBCO) IC process. The technique, called complementary mask planarization (CoMP), has been successfully implemented to planarize line gratings etched in an SrTiO/sub 3/ insulator. The average surface roughness of the line gratings as measured by an atomic force microscope (AFM) was reduced from 3000 to 250 /spl Aring/ after planarization. Films of YBCO were the posited and patterned in the form of narrow strips over the line gratings to simulate insulated crossovers in IC structures. The I-V characteristics of the YBCO strips over planarized line gratings showed that the critical current density is higher by two orders of magnitude than those over unplanarized gratings.

Keywords

atomic force microscopy; barium compounds; critical current density (superconductivity); high-temperature superconductors; integrated circuit technology; superconducting integrated circuits; surface treatment; yttrium compounds; I-V characteristics; SrTiO/sub 3/; SrTiO/sub 3/ insulating layer; YBCO film strip; YBa/sub 2/Cu/sub 3/O/sub 7/; atomic force microscopy; complementary mask planarization; critical current density; crossover; etched line grating; high-T/sub c/ multilevel IC process; surface roughness; Atomic force microscopy; Atomic measurements; Etching; Force measurement; Gratings; Insulation; Planarization; Rough surfaces; Strips; Yttrium barium copper oxide;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.659435

Filename

659435