Title :
Power-conscious scheduling algorithm for performance-driven datapath synthesis
Author :
Lee, Jhih-Shian ; Lee, Hae-Dong ; Park, C.-W. ; Hwang, S.-Y.
Author_Institution :
Dept. of Electron. Eng., Sogang Univ., Seoul
fDate :
8/15/1996 12:00:00 AM
Abstract :
A power-conscious scheduling algorithm for the synthesis of datapaths with low power consumption is described. The proposed algorithm schedules operations so that switching activity can be minimised at functional modules. Experimental results confirm the efficiency of the proposed algorithm
Keywords :
CMOS digital integrated circuits; integrated circuit design; modules; scheduling; CMOS; algorithm efficiency; area constraints; functional modules; performance-driven datapath synthesis; power consumption; power-conscious scheduling algorithm; switching activity;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19961074
