Separate Extraction of Source, Drain, and Substrate Resistances in MOSFETs With Parasitic Junction Current Method

Author

Bae, Hagyoul ; Baek, Seok Cheon ; Lee, Sunyeong ; Jang, Jaeman ; Shin, Ja Sun ; Yun, Daeyoun ; Kim, Hyojong ; Kim, Dae Hwan ; Kim, Dong Myong

Author_Institution

Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea

Volume

31

Issue

11

fYear

2010

Firstpage

1190

Lastpage

1192

Abstract

The separate extraction of asymmetric source (R_S) and drain (R_D) resistances caused by the variations in the layout, process, and device degradation is important in the practical modeling and characterization of MOSFETs and their integrated circuits. We propose a simple “parasitic junction current method” (PJCM) for the separate extraction of R_S, R_D, and R_SUB (substrate resistance) in MOSFETs. We applied the proposed PJCM to n-channel MOSFETs with different W/L combinations and verified its usefulness in the robust extraction of R_S, R_D, and R_SUB.

Keywords

MOSFET; MOSFET; asymmetric source; device degradation; drain resistances; parasitic junction current method; source resistances; substrate resistances; Integrated circuit modeling; Junctions; Logic gates; MOSFETs; Resistance; Substrates; Drain resistance; MOSFET; parameter extraction; parasitic junction; parasitic resistance; source resistance; substrate resistance;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2010.2066257

Filename

5582196