Improved LOCOS isolation for thin-film SOI MOSFETs

The authors propose the use of a recessed LOCOS technique instead of a standard LOCOS process to eliminate parasitic edge transistor leakage in thin-film SOI MOSFETs. This technique helps to increase the sidewall threshold voltage by both avoiding excess boron segregation into the field oxide, and providing a smoother edge rounding than that obtained by a classical LOCOS process