DocumentCode
1333382
Title
An Evaluation of Asynchronous Stacks
Author
Ebergen, Jo ; Finchelstein, D. ; Kao, R. ; Lexau, J. ; Hopkins, Debbie
Volume
28
Issue
5
fYear
2011
Firstpage
52
Lastpage
61
Abstract
This article presents a case study of a fast and energy-efficient hardware implementation of a stack. The design is highly scalable, as its cycle time remains unchanged and energy per operation grows very slowly, with an increase in the number of storage locations. This design example demonstrates two often-claimed benefits of asynchronous circuit design: the potential for high average-case performance and low power consumption.
Keywords
asynchronous circuits; logic design; power aware computing; asynchronous circuit design; asynchronous stack evaluation; energy efficient hardware implementation; storage locations; Asynchronous transfer mode; Energy consumption; Power demand; Random access memory; Throughput; LIFO; asynchronous circuits; design and test; dynamic-energy consumption; stack; static-energy consumption;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2011.95
Filename
6028535
Link To Document