Title :
Schottky Barrier Silicon Nanowire SONOS Memory With Ultralow Programming and Erasing Voltages
Author :
Shih, Chun-Hsing ; Chang, Wei ; Luo, Yan-Xiang ; Liang, Ji-Ting ; Huang, Ming-Kun ; Chien, Nguyen Dang ; Shia, Ruei-Kai ; Tsai, Jr-Jie ; Wu, Wen-Fa ; Lien, Chenhsin
Author_Institution :
Dept. of Electr. Eng., Nat. Chi Nan Univ., Puli, Taiwan
Abstract :
A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory can operate at gate voltages of 5 to 7 V for programming and -7 to -9 V for erasing through Fowler-Nordheim tunneling. The larger the gate voltage is, the faster the programming/erasing speed and the wider the threshold-voltage shift are attained. Importantly, the SB nanowire SONOS cells exhibit superior 100-K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling.
Keywords :
Schottky barriers; elemental semiconductors; low-power electronics; nanowires; random-access storage; silicon; silicon compounds; tunnelling; Fowler-Nordheim tunneling; Schottky barrier silicon nanowire SONOS memory; Si; field enhanced tunneling; metallic silicidation process; nonvolatile nanowire memory; nonvolatile silicon oxide nitride oxide silicon memory; silicon gate-all-around nanowire; ultralow erasing voltage; ultralow programming voltage; voltage -7 V to -9 V; voltage 5 V to 7 V; Logic gates; Programming; SONOS devices; Schottky barriers; Silicon; Tunneling; Gate-all-around nanowire; Schottky barrier (SB); silicon–oxide-nitride-oxide-silicon (SONOS) memory;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2164510
