DocumentCode :
1333927
Title :
Investigation of interfacial fracture behavior of a flip-chip package under a constant concentrated load
Author :
Wang, Jianjun ; Lu, Minfu ; Zou, Daqing ; Liu, Sheng
Author_Institution :
Dept. of Mech. Eng., Wayne State Univ., Detroit, MI, USA
Volume :
21
Issue :
1
fYear :
1998
fDate :
2/1/1998 12:00:00 AM
Firstpage :
79
Lastpage :
86
Abstract :
In this paper, the interfacial fracture behavior of a flip-chip package subjected to a constant concentrated line load was investigated using a unique six-axis submicron tester coupled with a high density laser moire interferometry. The real-scale three-point bending flip-chip specimen, capable of measuring the crack growth rate (along the interface) and the interfacial fracture toughness was developed. The results show that the crack propagation along the interface of the passivated silicon chip/underfill under a constant concentrated load can be categorized into three stages occurring in the order mentioned with obvious transition points between them: (1) stable crack propagation stage; (2) unstable crack propagation stage; (3) quasicrack arrest stage. The moire interferometry technique was used to monitor and measure the crack length during the test. The crack growth rate along the interface of the passivated silicon chip/underfill was calculated in terms of the load line deflection versus time curve obtained from the test. In addition, the relationship between the crack length and the load line deflection was calibrated by using finite element analysis. The near tip displacement fields of the flip-chip package was also determined by the same method. The energy release rate was computed by using these near tip displacement variables through an analytical expression derived by authors. The interfacial fracture toughness Gc was determined by calculating the energy release rate corresponding to the crack length at the quasicrack arrest stage measured in the test. The underfill/chip passivation fracture toughness Gc and the phase angle φ for the flip-chip package used in our experiments are about 35 J/m2 and -65°, respectively
Keywords :
cracks; finite element analysis; flip-chip devices; fracture toughness; integrated circuit packaging; light interferometry; moire fringes; plastic packaging; constant concentrated line load; crack growth rate; energy release rate; finite element analysis; flip-chip package; interfacial fracture toughness; laser moire interferometry; near tip displacement; phase angle; quasicrack arrest; silicon chip passivation; six-axis submicron tester; three-point bending; underfill; Finite element methods; Interferometry; Length measurement; Monitoring; Optical coupling; Optical propagation; Packaging; Semiconductor device measurement; Silicon; Testing;
fLanguage :
English
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1070-9894
Type :
jour
DOI :
10.1109/96.659510
Filename :
659510
Link To Document :
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