Design and test of elementary digital circuits based on monolithic SOI JFETs

Silicon on insulator (SOI) junction field effect transistor (JFETs) are used to develop digital gates for cryogenic applications. Only one type of JFET is necessary to design an NOR gate using a basic inverter circuit and a level shifter. The JFET´s involved in these designs are available in a process radiation hard at room temperature and operate with improved characteristics at cryogenic temperatures (90 K, temperature of liquid argon calorimeters for high-energy physics). Test circuits have been designed to evaluate their performance. The measured characteristics prove to be satisfactory compared to the simulated ones, although some improvements are still necessary. A propagation delay of 4.4 ns per gate for a power dissipation of ≈3 mW per gate is obtained. With the present development of cryogenic front end preamplifiers for the readout of calorimeter signals, this study opens some prospects for integrating more mixed digital analog electronics such as pipelines within the detectors.