Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems

Author

Jinwook Oh ; Gyeonghoon Kim ; Injoon Hong ; Junyoung Park ; Seungjin Lee ; Joo-Young Kim ; Jeong-Ho Woo ; Hoi-Jun Yoo

Author_Institution

Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

32

Issue

6

fYear

2012

Firstpage

38

Lastpage

50

Abstract

A new low-power object-recognition processor achieves real-time robust recognition, satisfying modern mobile vision systems´ requirements. The authors introduce an attention-based object-recognition algorithm for energy efficiency, a heterogeneous multicore architecture for data- and thread-level parallelism, and a network on a chip for high on-chip bandwidth. The fabricated chip achieves 30 frames/second throughput and an average 320 mW power consumption on test 720p video sequences, yielding 640 GOPS/W and 10.5 NJ/pixel energy efficiency.

Keywords

computer vision; energy conservation; image sequences; low-power electronics; multiprocessing systems; network-on-chip; object recognition; parallel architectures; power aware computing; real-time systems; video signal processing; attention-based object recognition algorithm; data-level parallelism; energy efficiency; heterogeneous multicore architecture; low-power real-time object recognition processors; mobile vision systems; network on a chip; on-chip bandwidth; power 320 mW; real-time robust recognition; thread-level parallelism; video sequences; Decision support systems; Low power electronics; Multicore processing; Network-on-a-chip; Object recognition; Robustness; SIFT; attention; attention-based object recognition; heterogeneous multicore; multicore processor; network-on-chip; object recognition; object-recognition pipeline; scale invariant feature transform;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/MM.2012.90

Filename

6353416