Title :
Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
Author :
Sakurai, Takayasu ; Newton, A. Richard
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
4/1/1990 12:00:00 AM
Abstract :
An α-power-law MOS model that includes the carrier velocity saturation effect, which becomes prominent in short-channel MOSFETs, is introduced. The model is an extension of Shockley´s square-law MOS model in the saturation region. Since the model is simple, it can be used to handle MOSFET circuits analytically and can predict the circuit behavior in the submicrometer region. Using the model, closed-form expressions for the delay, short-circuit power, and transition voltage of CMOS inverters are derived. The delay expression includes input waveform slope effects and parasitic drain/source resistance effects and can be used in simulation and/or optimization CAD tools. It is found that the CMOS inverter delay becomes less sensitive to the input waveform slope and that short-circuit dissipation increases as the carrier velocity saturation effect in short-channel MOSFETs gets more severe
Keywords :
CMOS integrated circuits; circuit analysis computing; delays; insulated gate field effect transistors; integrated logic circuits; semiconductor device models; α-power-law MOS model; CMOS inverter delay; CMOS inverters; MOSFET model; carrier velocity saturation effect; circuit behavior; delay; input waveform slope effects; optimization CAD tools; parasitic drain/source resistance effects; short-channel MOSFETs; short-circuit power; simulation; submicrometer region; submicron devices; transition voltage; Circuit analysis; Circuit simulation; Closed-form solution; Delay effects; Inverters; MOSFET circuits; Predictive models; Propagation delay; Semiconductor device modeling; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
