Oxide Thinning and Structure Scaling Down Effect of Low-Temperature Poly-Si Thin-Film Transistors

In this paper, the gate oxide thickness, and the channel length and width of low-temperature poly-Si thin-film transistors (LTPS-TFTs) have been comprehensively studied. The scaling down of gate oxide thickness from 50 to 20 nm significantly improves the subthreshold swing (S.S.) of LTPS-TFTs from 1.797 V/decade to 0.780 V/decade and the threshold voltage V_TH from 10.87 V to 5.00 V. Moreover, the threshold voltage V_TH roll-off is also improved with the scaling down of gate oxide thickness due to gate capacitance density enhancement. The channel length scaling down also shows significant subthreshold swing S.S. improvement due to a decreasing of the channel grain boundary trap density Nt. However, the scaling down of channel length also increases the series resistance effect, resulting in the degradation of the field-effect mobility μ_FE. Therefore, the channel length dependence of field-effect mobility μ_FE is slightly different with different channel width due to the competition of channel grain boundary trap density effect and series resistance effect.