DocumentCode
1335563
Title
Performance Enhancement of Boost Converter Based on PID Controller Plus Linear-to-Nonlinear Translator
Author
Hwu, K.I. ; Yau, Y.T.
Author_Institution
Dept. of Electr. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Volume
25
Issue
5
fYear
2010
fDate
5/1/2010 12:00:00 AM
Firstpage
1351
Lastpage
1361
Abstract
Here, A PID controller plus a novel linear-to-nonlinear translator is proposed and applied to the boost converter to improve the operating performance of the boost converter under large transient variations in load all over the quiescent dc input voltage range. The proposed translator is inserted between the PID controller and the main power stage such that the PID controller considers the behavior of the boost converter to be quasi-linear, thereby suppressing the effect of nonlinear behavior of the boost converter on the PID controller. Besides, variations in dc gain of the control-to-output transfer function with the translator are smaller than those without the translator, thus making system control easy to attain. Also, one-comparator counter-based sampling without any A-D converter is presented herein to realize the proposed control strategy. As mentioned above, the proposed control strategy can make the boost converter stably operated under large load transient responses all over the quiescent dc input voltage range.
Keywords
power convertors; three-term control; A-D converter; PID controller; boost converter; control strategy; control-to-output transfer function; dc input voltage range; linear-to-nonlinear translator; load transient; performance enhancement; Boost converter; PID controller; field programmable gate array (FPGA); linear-to-nonlinear translator; one-comparator counter-based sampling; voltage conversion ratio; without any A–D converter (A–DC);
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2009.2036727
Filename
5337893
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