• DocumentCode
    1336125
  • Title

    Vector sets for exhaustive testing of logic circuits

  • Author

    Seroussi, Gadiel ; Bshouty, Nader H.

  • Author_Institution
    Cyclotomics Inc., Berkeley, CA, USA
  • Volume
    34
  • Issue
    3
  • fYear
    1988
  • fDate
    5/1/1988 12:00:00 AM
  • Firstpage
    513
  • Lastpage
    522
  • Abstract
    (L, d)-universal sets are useful for exhaustively testing logic circuits with a large number of functional components, designed so that every functional component depends on at most d inputs. Randomized and deterministic constructions of ( L, d)-universal test sets are presented, and lower and upper bounds on the optimal sizes of such sets are proven. It is also proven that the design of an optimal exhaustive test set for an arbitrary logic circuit is an NP-complete problem
  • Keywords
    combinatorial circuits; logic testing; (L, d)-universal test sets; NP-complete problem; combinational circuits; exhaustive testing; logic circuits; lower bounds; upper bounds; vector sets; Boolean functions; Circuit testing; Combinational circuits; Communication system control; Computer science; Laboratories; Logic circuits; Logic testing; NP-complete problem; Upper bound;
  • fLanguage
    English
  • Journal_Title
    Information Theory, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9448
  • Type

    jour

  • DOI
    10.1109/18.6031
  • Filename
    6031