Title :
Pseudorandom testing for boundary-scan design with built-in self-test
Author :
Nagvajara, Prawat ; Karpovsky, M.G. ; Levitin, L.B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Drexel Univ., Philadelphia, PA, USA
Abstract :
The design of a pseudorandom pattern generator for a boundary-scan chip with built-in self-test is described. The proposed test-generation procedure, together with a method of connecting the generator outputs and the primary inputs of the chip under test, ensures full pattern coverage. The authors show how to evaluate the choice of generator parameters and initial states when there are more flip-flops in the generator than bits in the test pattern.<>
Keywords :
built-in self test; flip-flops; network synthesis; random processes; boundary-scan chip; boundary-scan design; built-in self-test; flip-flops; full pattern coverage; generator outputs; initial states; primary inputs; pseudorandom pattern generator; test-generation procedure; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Connectors; Data engineering; Design engineering; Flip-flops; Registers; Test pattern generators;
Journal_Title :
Design & Test of Computers, IEEE
