Design of embedded systems: formal models, validation, and synthesis

Author

Edwards, Stephen ; Lavagno, Luciano ; Lee, Edward A. ; Sangiovanni-Vincentelli, Alberto

Author_Institution

California Univ., Berkeley, CA, USA

Volume

85

Issue

3

fYear

1997

fDate

3/1/1997 12:00:00 AM

Firstpage

366

Lastpage

390

Abstract

This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware application-specific integrated circuits (ASICs) with embedded software. The concurrent design process for such embedded systems involves solving the specification, validation, and synthesis problems. We review the variety of approaches to these problems that have been taken

Keywords

application specific integrated circuits; computer architecture; formal specification; formal verification; logic design; real-time systems; systems analysis; ASIC; application-specific integrated circuits; concurrent design process; embedded software; embedded systems design; formal models; formal validation; heterogeneous systems; reactive real-time system design; specification; Application software; Application specific integrated circuits; Computer architecture; Consumer electronics; Embedded computing; Embedded system; Hardware; Microcontrollers; Real time systems; Safety;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/5.558710

Filename

558710