Effective loss reduction analysis in new switched-capacitor boost-multilevel inverter using series/parallel conversion

Author

Deshmukh, S.S. ; Jadhav, H.T.

Author_Institution

Dept. of Electr. Eng., Rajarambapu Inst. of Technol., Sangli, India

fYear

2014

fDate

1-2 March 2014

Firstpage

1

Lastpage

5

Abstract

An switched capacitor multi-level inverter gives higher voltages than the input dc voltage with help of series-parallel conversion operation. In this paper we are finding out from the various methods of multi-level inverters to reduce total harmonic distortion (THD) voltage in bus output of inverter as well as reduction of switching frequency ultimately overall improvement in efficiency of inverter. Also this inverter can reduce need of input step up dc voltage converter system as well as output side transformer or inductors to reduction of overall size of inverter. All results are obtained using MATLAB (SIMULINK) also theoretical results are calculated and verified with simulated results.

Keywords

PWM invertors; PWM power convertors; power harmonic filters; switched capacitor networks; input step up dc voltage converter system; loss reduction analysis; output side transformer; series parallel conversion; switched capacitor boost multilevel inverter; switching frequency; total harmonic distortion voltage; Capacitors; Inverters; Pulse width modulation; Switches; Switching frequency; Switching loss; THD reduction; multi-carrier PWM switched capacitor; multi-level inverter;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical, Electronics and Computer Science (SCEECS), 2014 IEEE Students' Conference on

Conference_Location

Bhopal

Print_ISBN

978-1-4799-2525-4

Type

conf

DOI

10.1109/SCEECS.2014.6804460

Filename

6804460