Design and analysis of efficient multilevel receiver for current mode interconnect system

The focus of the present research is to design a receiver circuit for high speed and high throughput data transmission over the interconnect line. This is achieved using current mode signaling in interconnects. In the present paper an efficient receiver for current mode interconnect system is proposed. The analysis shows that the proposed receiver has 26.65% lesser latency at room temperature for an interconnect length of 8 mm and 18.59% at 40°C. It offers higher throughput of 37.5% for an interconnect length of 8mm in comparison to voltage mode interconnect system. The proposed technique shall be useful for systems with operating frequencies in GHz range and low latency requirement.