DocumentCode :
133961
Title :
Radiation tolerant heterogeneous Multicore “system on chip” with built-in multichannel SpaceFibre switch for the “intelligent” signals and images processing systems
Author :
Solokhina, Tatiana ; Petrichkovich, Jaroslav ; Glushkov, Alexander ; Alekseev, I. ; Menshenin, Leonid ; Yuriy, Sheynin ; Elena, Suvorova
Author_Institution :
ELVEES RnD Center, Zelenograd, Russia
fYear :
2014
fDate :
22-26 Sept. 2014
Firstpage :
1
Lastpage :
5
Abstract :
The article presents a Radiation tolerant heterogeneous Multi-core ASIC MC-30SF6 as the SoC (System-on-Chip) for the onboard “intelligent” signals and images processing systems. MC-30SF6 based on a CMOS 180nm Radiation tolerant library and consists of the five ELVEES IP - cores for the processing and compression data with extra performance more than 9 GFLOPs. The SoC design and architecture support fault tolerance against SEU errors. SoC has built-in multichannel multiprotocol SpaceFibre/GigaSpaceWire (SpaceWire-RUS standard)/SpaceWire embedded networking subsystem. The networking subsystem provides multiple ports for high-rate interconnection with combination of SpaceWire/GigaSpaceWire/SpaceFibre links. SoC support four ports GigaSpaceWire/two ports SpaceWire switch. Input and processed data streams transmitted via 1.25 Gbps two multiprotocol SpaceFibre/GigaSpaceWire and four GigaSpaceWire links. Two SpaceWire links (ECSS-E-50-12C) provide data transfer bandwidth from 2 up to 400 Mbps. The MC-30SF6 embedded networking subsystem on the base SpaceWire/GigaSpaceWire/SpaceFibre provide a balance between ASIC throughput and SoC performance especially for the multifunctional micro and nanosatellites systems.
Keywords :
CMOS digital integrated circuits; data compression; embedded systems; fault tolerance; image processing; integrated circuit design; logic circuits; microprocessor chips; multiprocessing systems; protocols; radiation hardening (electronics); system-on-chip; ASIC throughput; CMOS radiation tolerant library; ECSS-E-50-12C; ELVEES IP-cores; GFLOP; GigaSpaceWire-SpaceWire switch; MC-30SF6 embedded networking subsystem; SEU errors; SoC design; SoC performance; SpaceFibre-GigaSpaceWire-SpaceWire embedded networking subsystem; SpaceWire-GigaSpaceWire-SpaceFibre links; SpaceWire-RUS standard; application specific integrated circuits; bit rate 1.25 Gbit/s; bit rate 2 Mbit/s to 400 Mbit/s; built-in multichannel SpaceFibre switch; built-in multichannel multiprotocol; data compression; data streams; data transfer bandwidth; fault tolerance; images processing systems; intelligent signals; microsatellites systems; multiprotocol SpaceFibre-GigaSpaceWire; nanosatellites systems; radiation tolerant heterogeneous multicore ASIC MC-30SF6; radiation tolerant heterogeneous multicore system on chip; size 180 nm; IP networks; Image processing; Multicore processing; Ports (Computers); Switches; System-on-chip; Radiation tolerant heterogeneous Multicore ASIC; multiprotocol SpaceFibre/GigaSpaceWire based links;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SpaceWire Conference (SpaceWire), 2014 International
Conference_Location :
Athens
Type :
conf
DOI :
10.1109/SpaceWire.2014.6936228
Filename :
6936228
Link To Document :
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