DocumentCode
1339688
Title
True background calibration technique for pipelined ADC
Author
Sonkusale, S. ; Van der Spiegel, J. ; Nagaraj, K.
Author_Institution
Dept. of Electr. Eng., Pennsylvania Univ., Philadelphia, PA, USA
Volume
36
Issue
9
fYear
2000
fDate
4/27/2000 12:00:00 AM
Firstpage
786
Lastpage
788
Abstract
A digital background calibration technique for a pipelined analogue-to-digital converter (ADC) is presented. The calibration technique involves the use of a slow, but accurate, ADC in conjunction with a least-mean squares (LMS) algorithm to find the parameters, which correct for residue errors such as finite opamp gain error, capacitor ratio mismatch and charge injection error in a nonideal pipeline stage, resulting in a significant improvement in the INL and the DNL of the ADC
Keywords
analogue-digital conversion; calibration; least mean squares methods; pipeline processing; DNL; INL; capacitor ratio mismatch; charge injection error; digital background calibration; finite opamp gain error; least-mean squares algorithm; nonideal pipeline stage; pipelined ADC; residue errors; true background calibration technique;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20000610
Filename
843771
Link To Document