• DocumentCode
    1340187
  • Title

    A Novel Simulation Fault Injection Method for Dependability Analysis

  • Author

    Lee, Dongwoo ; Na, Jongwhoa

  • Author_Institution
    Korea Aerosp. Univ., South Korea
  • Volume
    26
  • Issue
    6
  • fYear
    2009
  • Firstpage
    50
  • Lastpage
    61
  • Abstract
    Presilicon testing and verification is a crucial step in qualifying the RTL for the subsequent implementation phases. This article presents a novel simulation-based fault injection methodology that is applied at the system description level, as opposed to the lower, flattened RT level, in order to reduce simulation time.
  • Keywords
    circuit simulation; elemental semiconductors; fault diagnosis; semiconductor device reliability; semiconductor device testing; silicon; Si; dependability analysis; presilicon testing; presilicon verification; simulation fault injection method; simulation-based fault injection methodology; Analytical models; Circuit faults; Computational modeling; Costs; Embedded system; Failure analysis; Fault tolerance; Hardware design languages; Redundancy; Reliability engineering; design and test; electronic systems level; fault injection; kernel-based fault injection; reliability;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.135
  • Filename
    5340387
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1340187