An experimental evaluation of SpaceFibre resource requirements

SpaceFibre is the next generation of high speed interconnects for spacecraft communication networks. However the high performance and advanced features mean that SpaceFibre interfaces have an inherently high level of complexity, rendering implementation in some FPGA systems difficult due to limited hardware resources. This paper presents an investigation into the hardware resource characteristics of SpaceFibre through an experimental evaluation using the StarDundee IP core, including discussion of functionality tradeoffs that can be made when designing an interface for a limited number of hardware resources. A simple SpaceFibre interface optimised for a high-throughput instrument is subsequently described, with a specific focus on resource savings achieved when implementing for the RTAX2000 FPGA.