DocumentCode :
1340921
Title :
The Use of Parenthesis-Free Notation for the Automatic Design of Switching Circuits
Author :
Lawler, E.L. ; Salton, G.A.
Author_Institution :
Sylvania Electric Products, Inc., Needham, Mass.
Issue :
3
fYear :
1960
Firstpage :
342
Lastpage :
352
Abstract :
A parenthesis-free notation is introduced for the representation of series-parallel switching networks. The notation facilitates the calculation of circuit parameters and permits an unambiguous characterization of the circuit topology. Given certain criteria for feasibility of a switching network related to the circuit parameter values, it is shown how an infeasible series-parallel network can be transformed into an equivalent feasible network by ``cascading´´ operations applied to the two-terminal sub-networks of the original network. A systematic method is developed, resulting in an optimum choice of cascading operations such that the number of switching elements required to implement the transformed circuit is minimized relative to cascading.
Keywords :
Boolean functions; Circuit synthesis; Circuit topology; Costs; Coupling circuits; Inverters; Logic; Minimization; Switching circuits; Transforms;
fLanguage :
English
Journal_Title :
Electronic Computers, IRE Transactions on
Publisher :
ieee
ISSN :
0367-9950
Type :
jour
DOI :
10.1109/TEC.1960.5219857
Filename :
5219857
Link To Document :
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